Part Number : QS5LV91970J

Function : 3.3V LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER

Package : QSOP 8 Pin, PLCC 28 Pin Type

Maker : Integrated Device Technology

Pinouts :
QS5LV91970J datasheet

Description :

The QS5LV919 Clock Driver uses an internal phase locked loop (PLL) to lock low skew outputs to one of two reference clock inputs. Eight outputs are available: 2xQ, Q0-Q4, Q5, Q/2.

Features

• 3.3V operation
• JEDEC compatible LVTTL level outputs
• Clock inputs are 5V tolerant
• < 300ps output skew, Q0–Q4
• 2xQ output, Q outputs, Q output, Q/2 output
• Outputs 3-state and reset while OE/RST low
• PLL disable feature for low frequency testing
• Internal loop filter RC network
• Functional equivalent to MC88LV915, IDT74FCT388915

Datasheet PDF Download :
QS5LV91970J pdf

Others datasheet of same file : QS5LV91970

2021/07/29 15:18 2021/07/29 15:18

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