Part Number : EPM7256SRI208-10
Function : Programmable logic , 256 macrocells, 16 logic array blocks, 164 I/O pins, 10ns
Package : QFP 208 Pin type
Maker : Altera Corporation
Pinouts : 
Description :
The MAX 7000 family of high-density, high-performance PLDs is based
on Altera’s second-generation MAX architecture.
Features :
1. High-performance, EEPROM-based programmable logic devices (PLDs) based on second-generation MAX architecture
2. 5.0-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available in MAX 7000S devices
– ISP circuitry compatible with IEEE Std. 1532
3. Includes 5.0-V MAX 7000 devices and 5.0-V ISP-based MAX 7000S devices
4. Built-in JTAG boundary-scan test (BST) circuitry in MAX 7000S devices with 128 or more macrocells
Datasheet PDF Download : 
Others datasheet of same file :
EPM7256AEFC256-10, EPM7256AEQC208-10, EPM7256SQC208-10,
EPM7256SQC208-10F, EPM7256SQC208-15
