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Samsung
K4S561632J-UC75
DRAM Chip SDRAM 256M-Bit 16Mx16 3.3V 54-Pin TSOP-II
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Description

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The K4S560432J / K4S560832J / K4S561632J is 268435456 bits synchronous high data rate Dynamic RAM organized as 4 x 16777216 words by 4 bits / 4 x 8388608 words by 8bits / 4 x 4194304 words by 16bits fabricated with SAMSUNGs high performance CMOS technology.

Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth high performance memory system applications.



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