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Description

The SN65LVDS95 LVDS serdes (serializer/deserializer) transmitter contains three 7-bit parallel-load serial-out shift registers, a 7×clock synthesizer, and four low-voltage differential signaling (LVDS) line drivers in a single integrated circuit. These functions allow 21 bits of single-ended LVTTL data to be synchronously transmitted over 4 balanced-pair conductors for receipt by a compatible receiver, such as the SN65LVDS96.

Features :

1. Qualified for Automotive Applications
2. 21:3 Data Channel Compression at up to 1.36 Gigabits per Second Throughput
3. Suited for Point-to-Point Subsystem Communication With Very Low EMI
4. 21 Data Channels Plus Clock in Low-Voltage TTL and 3 Data Channels Plus
5. Clock Out Low-Voltage Differential
6. Operates From a Single 3.3-V Supply and 250 mW (Typ)
7. 5-V Tolerant Data Inputs
8. LVDS95 Has Rising Clock Edge Triggered nputs
9. Bus Pins Tolerate 6-kV HBM ESD
10. Packaged in Thin Shrink Small-Outline
11. Package With 20 Mil Terminal Pitch
12. Consumes <1 mW When Disabled
13. Wide Phase-Lock Input Frequency Range
14. 20 MHz to 68 MHz
15. No External Components Required for PLL
16. Replacement for the National DS90CR215

Official Homepage : https://www.ti.com/product/SN65LVDS95-Q1