Description:These octal bus transceivers are designed for asynchronous communication between data buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus,depending on the logic level at the direction-control (DIR) input. The output-enable(OE) input can be used to disable the device so the buses are effectively isolated. When VCCis between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. 1. State-of-the-Art EPIC-ΙΙB BiCMOS Design
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Related Part Number |
SNJ54HCT652JT | SNC109 SN8P2613 | SN8P2602B SN8P2501 | SN75ALS199N |