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NXP Semiconductors
SAA7201H/C3
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Description

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The SAA7201H, SAA7201 is an MPEG2 decoder which combines audio decoding and video decoding. Additionally to these basic MPEG functions it also provides means for enhanced graphics and/or on-screen display. 

Due to an optimized architecture for audio and video decoding, maximum capacity in the external memory and processing power from the external CPU is available for the support for graphics.

 Block Diagram

Features : 

1. Single 27 MHz external clock for time base reference and internal processing; all required decoding and presentation clocks are generated internally

2. Internal system time base at 90 kHz can be synchronized via CPU port

3. Flexible memory allocation under control of the external CPU enables optimized partitioning of memory for different tasks

 


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