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Description

The PCA9517A is a CMOS integrated circuit that provides level shifting between low
voltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I2C-bus or SMBus applications. While retaining all the operating modes and features of the I2C-bus system during the level shifts, it also permits extension of the I2 C-bus by providing bidirectional buffering for both the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. Using the PCA9517A enables the system designer to isolate two halves of a bus for both voltage and capacitance.

Port A of two or more PCA9517As can be connected together, however, to allow a star topography with port A on the common bus, and port A can be connected directly to any other buffer with static or dynamic offset voltage. Multiple PCA9517As can be connected in series, port A to port B, with nobuild-up in offset voltage with only time of flight delays to consider.

Features

1. 2 channel, bidirectional buffer isolates capacitance and allows 400 pF on either side of
the device
2. Voltage level translation from 0.9 V to 5.5 V and from 2.7 V to 5.5 V
3. Footprint and functional replacement for PCA9515 / PCA9515A
4. I2C-bus and SMBus compatible
5. Active HIGH repeater enable input
6. Open-drain input/outputs
7. Lock-up free operation
8. Supports arbitration and clock stretching across the repeater
9. Accommodates Standard-mode and Fast-mode I2 C-bus devices and multiple masters
10. Powered-off high-impedance I2C-bus pins
11. 5V tolerant I2C-bus and enable pins