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HEF4017BT,653
4000B Series 3 to 15 V SMT 5-Stage Johnson Decade Counter - SOIC-16
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Description

:

The HEF4017B is a 5-stage Johnson decade counter with ten spike-free decoded active
HIGH outputs (Q0 to Q9), an active LOW carry output from the most significant flip-flop
(Q5-9), active HIGH and active LOW clock inputs (CP0, CP1) and an overriding
asynchronous masterreset input (MR).

The counter is advanced by either a LOW-to-HIGH transition at CP0 while CP1 is LOW or
a HIGH-to-LOW transition at CP1 while CP0 is HIGH (see Table 3).
When cascading counters, the Q5-9 output, which is LOW while the counter is in states 5,
6, 7, 8, and 9, can be used to drive the CP0 input of the next counter. A HIGH on MR
resets the counter to zero (Q0 = Q5-9 = HIGH; Q1 to Q9 = LOW) independent of the clock
inputs (CP0, CP1).

Automatic counter code correction is providedby an internal circuit: following any illegal
code the counter returns to a proper counting mode within 11 clock pulses.
Schmitt trigger action makes the clock inputs highly tolerant of slower rise and fall times.
It operates over a recommended VDDpower supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.

Features : 

1. Automatic counter correction

2. Tolerant of slow clock rise and fall times

3. Fully static operation

4. 5 V, 10 V, and 15 V parametric ratings

5. Standardized symmetrical output characteristics



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