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Description

The CY7C185-20PC, CY7C185 is a high-performance CMOS static RAM organized as 8192 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE1), an active HIGH chip enable (CE 2), and active LOW output enable (OE) and three-state drivers. This device has an automatic power-down feature (CE 1or CE2), reducing the power consumption by 70% when deselected. The CY7C185 is in a standard 300-mil-wide DIP, SOJ, or SOIC package.

An active LOW write enable signal (WE) controls the writing/reading operation of the memory. When CE 1and WEin puts are both LOW and CE2is HIGH, data on the eight data input/output pins (I/O0 through I/O7 ) is written into the memory location addressed by the address present on the address pins (A0through A 12). Reading the device is accomplished by selecting the device and enabling the outputs, CE 1and OE active LOW, CE2active HIGH, while WEremains inactive or HIGH. Under these conditions, the contents of the location ad dressed by the information on address pins are present on the eight data input/output pins.

Features

• High speed - 15 ns

• Fast tDOE

• Low active power - 715 mW

• Low standby power - 220 mW

• CMOS for optimum speed/power