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Description

The IDT 8P34S1208 is a high-performance differential LVDS fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals.

The 8P34S1208i is characterized to operate from a 1.8V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the 8P34S1208i ideal for those clock distribution applications demanding well-defined performance and repeatability.

Two selectable differential inputs and eight low skew outputs are available. The integrated bias voltage reference enables easy interfacing of AC-coupled signals to the device inputs.

The device is optimized for low power consumption and low additive phase noise.
 
Features

• Eight low skew, low additive jitter LVDS output pairs

• Two selectable, differential clock input pairs

• Differential CLK, nCLK pairs can accept the following differential input levels: LVDS, CML

• Maximum input clock frequency: 1.2GHz (maximum)