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Description

The 74LVT273 is a high-performance BiCMOS product designed for VCCoperation at
3.3 V. This device has eight edge-triggered D-type flip-flops with individual D inputs and Q
outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and rese
(clear) all flip-flops simultaneously.

The register is fully edge-triggered. The state of each D input, one setup time before the
LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop’s Q output.

All outputs will be forced LOW independent of the clock or data inputs by a LOW voltage
level on the MR input. The device is useful for applications where only the true output is
required and the CP andMR are common elements.

Features

1. Eight edge-triggered D-type flip-flops

2. Buffered common clock and asynchronous master reset

3. Input and output interface capability to systems at 5 V supply

Description

The 74LVT273 is a high-performance BiCMOS product designed for VCCoperation at
3.3 V. This device has eight edge-triggered D-type flip-flops with individual D inputs and Q
outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and rese
(clear) all flip-flops simultaneously.

The register is fully edge-triggered. The state of each D input, one setup time before the
LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop’s Q output.

All outputs will be forced LOW independent of the clock or data inputs by a LOW voltage
level on the MR input. The device is useful for applications where only the true output is
required and the CP andMR are common elements.

Features

1. Eight edge-triggered D-type flip-flops

2. Buffered common clock and asynchronous master reset

3. Input and output interface capability to systems at 5 V supply