PDF 74ALVCH16373 Download

Description

The 74ALVCH16373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear to be transparent to the data when the Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OEis HIGH, the outputs are in a high impedance state. The ALVCH16373 data inputs include active bushold circuitry, eliminating the need for external pull-up resistors to hold unused or floating data inputs at a valid logic level.

The 74ALVCH16373 is designed for low voltage (1.65V to 3.6V) VCCapplications with output compatibility up to 3.6V. The 74ALVCH16373 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintaining low CMOS power dissipation.

Features

1. 1.65V to 3.6V VCCsupply operation
2. 3.6V tolerant control inputs and outputs
3. Bushold on data inputs eliminates the need for external pull-up/pull-down resistors
4. Uses patented noise/EMI reduction circuitry
5. Latch-up conforms to JEDEC JED78