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Description

The 74AHC157 / 74AHCT157 are high-speed Si-gate CMOS devices and are pin compatible with Low Power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.

The 74AHC157/74AHCT157 are quad 2-input multiplexer which select 4 bits of data from two
sources under the control of a common data select input (S). The enable input (E) is active LOW. WhenE is HIGH, all of the outputs (1Y to 4Y) are forced LOW regardless of all other input conditions.

Features : 

1. Balanced propagation delays

2. All inputs have a Schmitt-trigger action

3. Inputs accepts voltages higher than VCC

4. Multiple input enable for easy expansion

5. Ideal for memory chip select decoding

6. For 74AHC157 only: operates with CMOS input levels 

7. For 74AHCT157 only: operates with TTL input levels