Part Number : AD6641
Function : 250 MHz Bandwidth, DPD Observation Receiver
Package : 56-Lead Lead Frame Chip Type
Maker : Analog Devices
Pinouts : 
Description :
The AD6641 is a 250 MHz bandwidth digital predistortion (DPD) observation receiver that integrates a 12-bit 500 MSPS ADC, a 16k × 12 FIFO, and a multimode back end that allows users to retrieve the data through a serial port (SPORT), the SPI interface, a 12-bit parallel CMOS port, or a 6-bit DDR LVDS port after being stored in the integrated FIFO memory. It is optimized for outstanding dynamic performance and low power consumption and is suitable for use in telecommunications applications such as a digital predistortion observation path where wider bandwidths are desired. All necessary functions, including the sample-and-hold and voltage reference, are included on the chip to provide a complete signal conversion solution.
Features
1. SNR = 65.8 dBFS at fINup to 250 MHz at 500 MSPS
2. Excellent linearity
3. DNL = ±0.5 LSB typical, INL = ±0.6 LSB typical
4. Integrated 16k × 12 FIFO
5. FIFO readback options
6. 12-bit parallel CMOS at 62.5 MHz
7. 6-bit DDR LVDS interface
8. High speed synchronization capability
9. 1 GHz full power analog bandwidth
10. Integrated input buffer
11. On-chip reference, no external decoupling required
12. Low power dissipation
13. 695 mW at 500 MSPS
14. Clock duty cycle stabilizer
15. Integrated data clock output with programmable clock data alignment
Applications :
1. Wireless and wired broadband communications
2. Communications test equipment
3. Power amplifier linearization
Datasheet PDF Download : 
Others datasheet of same file :
AD6641-500EBZ, AD6641BCPZ-500, AD6641BCPZRL7-500
