Function : 4Banks x 4M x 16Bit Synchronous DRAM / 54pin TSOP II Package
Maker : Hynix Semiconductor
The HY57V561620C is a 268,435,456bit CMOS Synchronous DRAM, ideally suited for the main memory applications which require large memory density and high bandwidth. HY57V561620C is organized as 4banks of 4,194,304x16.
HY57V561620C is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output voltage levels are compatible with LVTTL.
Datasheet PDF Download :
Others datasheet of same file : HY57V561620C,HY57V561620CLT-6I,HY57V561620CLT-8I,HY57V561620CLT-HI,HY57V561620CLT-KI