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Part Number : CD54HC112F3A
Function : HIGH SPEED CMOS LOGIC DUAL J-K FLIP-FLOPS WITH SET AND RESET, NEGATIVE-EDGE TRIGGER
Maker : Texas Instruments

Pinouts :
CD54HC112F3A datasheet

Description :

Description
The ’HC112 and ’HCT112 utilize silicon-gate CMOS technology to achieve operating speeds equivalent to LSTTL parts. They exhibit the low power consumption of standard CMOS integrated circuits, together with the ability to drive 10 LSTTL loads. These flip-flops have independent J, K, Set, Reset, and Clock inputs and Q andQ outputs. They change state on the negative-going transition of the clock pulse. Set and Reset are accomplished asynchronously by low-level inputs.
The HCT logic family is functionally as well as pin compatible with the standard LS logic family.

Features
• Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times
• Asynchronous Set and Reset
• Complementary Outputs
• Buffered Inputs
• Typical fMAX= 60MHz at VCC= 5V, CL= 15pF,TA= 25oC
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL= 30%, NIH= 30% of VCC at VCC= 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH= 2V (Min)
- CMOS Input Compatibility, Il ≤1µA at VOL, VOH


Datasheet PDF Download :
CD54HC112F3A pdf

Others datasheet of same file : 5962-8970201EA,CD54HC112F3A,CD54HCT112,CD54HCT112F3A,CD74HC112
2015/01/28 13:52 2015/01/28 13:52

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