Part Number : AD6641
Function : 250 MHz Bandwidth DPD Observation Receiver
Maker : Analog Devices

Pinouts :
AD6641 datasheet

Description :

The AD6641 is a 250 MHz bandwidth digital predistortion (DPD) observation receiver that integrates a 12-bit 500 MSPS ADC, a 16k × 12 FIFO, and a multimode back end that allows users to retrieve the data through a serial port (SPORT), the SPI interface, a 12-bit parallel CMOS port, or a 6-bit DDR LVDS port after being stored in the integrated FIFO memory. It is optimized for outstanding dynamic performance and low power consumption and is suitable for use in telecommunications applications such as a digital predistortion observation path where wider bandwidths are desired. All necessary functions, including the sample-and-hold and voltage reference, are included on the chip to provide a complete signal conversion solution.

SNR = 65.8 dBFS at fINup to 250 MHz at 500 MSPS
ENOB of 10.5 bits at fINup to 250 MHz at 500 MSPS (−1.0 d
SFDR = 80 dBc at fINup to 250 MHz at 500 MSPS (−1.0 d
Excellent linearity
DNL = ±0.5 LSB typical, INL = ±0.6 LSB typical
Integrated 16k × 12 FIFO
FIFO readback options
12-bit parallel CMOS at 62.5 MHz
6-bit DDR LVDS interface
SPORT at 62.5 MHz
SPI at 25 MHz
High speed synchronization capability
1 GHz full power analog bandwidth
Integrated input buffer
On-chip reference, no external decoupling required
Low power dissipation
695 mW at 500 MSPS
Programmable input voltage range
1.18 V to 1.6 V, 1.5 V nominal
1.9 V analog and digital supply operation
1.9 V or 3.3 V SPI and SPORT operation
Clock duty cycle stabilizer
Integrated data clock output with programmable clock
data alignment

Wireless and wired broadband communications
Communications test equipment
Power amplifier linearization

Datasheet PDF Download :
AD6641 pdf

Others datasheet of same file : AD6641,AD6641-500EBZ,AD6641BCPZ-500,AD6641BCPZRL7-500
2015/01/28 13:52 2015/01/28 13:52

This Blog provides Datasheets and information for electronic components and semiconductors